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Que. The host repeatedly checks if the controller is busy until it is not. It is in a loop that status register's busy bit becomes clear. This is called _____________ and a mechanism for the hardware controller to notify the CPU that it is ready is called ___________.
a. Interrupt and Polling
b. Polling and Spooling
c. Polling and Interrupt
d. Deadlock and Starvation
Answer:Polling and Interrupt

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