A directory of Objective Type Questions covering all the Computer Science subjects. Here you can access and discuss Multiple choice questions and answers for various compitative exams and interviews.

Discussion Forum

Que. A processor with separate decode and register fetch stages will probably have a
a. Canceling
b. Nullifying
c. Branch delay
d. Branch table
Answer:Branch delay
Confused About the Answer? Ask for Details Here
Know Explanation? Add it Here